Senior Design Team sample • Sample SD Site

Project Overview


The goal of this project is to create research vehicle for silicon, proving computational resistive random access memory(ReRAM or RRAM). We will create a ReRAM crossbar in the Skywater 130nm process which will then be submitted to the company Efabless to hopefully be selected to have our chip fabricated for free. A successful ReRAM crossbar will allow for a compute to be done directly in memory without the need for data transfer to a digital ALU. Through our reasearch and experimentation we also hope to be able to document the open source and Skywater pdk resources to be a resource for the proposed undergraduate co-curricular chip program

Team Members

Gage Moorman

Main Analog Designer

An Electrical Engineering student with a focus in Analog and Mixed Signal VLSI

Konnor Kivimagi

Mixed Signal Designer

An electrical engineering student with a focus in digital VLSI

Jason Xie

Main Digital Designer

An electrical engineering student with interests regarding mixed signal VLSI design, microwave circuit design, and computer hardware design.

Nathan Cook

Mixed Signal Designer

An Computer Engineering student with interest in microarchitecture and power efficiency





Weekly Reports for 491

Report 1
Report 2
Report 3
Report 4
Report 5
Report 6
Report 7
Report 8
Report 9




Biweekly Reports for 492

Report 1
Report 2
Report 3
Report 4
Report 5




Deliverables for Spring 2024

Final Design
Final Presentation




Final Deliverables for Fall 2024

Final Design Document
IRP Presentation
Poster
Demo Video
ReRAM Precheck Guide
ReRAM Simulation Issue
A Brief Excerpt on Mixed Signal Circuits for Xschem




Lightning Talks

Lightning Talk 1: Problem and Users
Lightning Talk 2: User Needs and Requirements
Lightning Talk 3: Project Plan
Lightning Talk 4: Design - Part 1
Lightning Talk 5: Design - Part 2
Lightning Talk 6: Contextualization and Design Check-in
Lightning Talk 7: Ethics and Proffesional Responsibility